A recent prior art random non-cyclical binary code generator of binary digital codes for one-time loading to memory, and for later synchronous retrieval by a supported signal processing system, is found in the patent application Ser. No. 13/595,684 filed Aug. 27, 2012 and prior publication data Neff US 2014/0056333 A1 of Feb. 27, 2014, followed by newly assigned patent number U.S. Pat. No. 9,071,341 published 30 Jun. 2015. In this prior art, a memory-based binary code source of random non-cyclical binary codes replaces the earlier prior art shift register based code generators referred to as pseudorandom noise (PN) binary code generators of today. The published patent U.S. Pat. No. 9,071,341 describes asynchronous random binary code generators that perform one-time loads of orthogonal non-repeating binary codes into two local memories usable by a supported signal processing system. This prior art code generator generates orthogonal codes for synchronous toggle between the two memories to generate a long epoch of non-repeating sets of random binary codes usable by a supported signal processing system. The random number generators in this prior art patent use unique random integer mappers to create near-ideal orthogonal random non-cyclical binary code sequences without shift registers. Each toggled memory contains a long epoch of generated orthogonal codes that can be used as a synchronous binary phase shifted key code family to overlay much slower transport data phase shift keyed data bits. This data overlay process deteriorates the original power spectral density profile requiring both data synchronization and code synchronization operations in the modulation and demodulation processes. However, unlike prior art binary code families of PN cyclical codes, the memory-based code that is optimized for long epochs of specific power spectral density profiles using a common 10 MHz chipping clock. This can reduce the code bandwidth with code power spectral density profiles and cross-correlation parameters consistent with longer epochs of non-repeating orthogonal binary codes. This prior art code family still has sidelobes outside the main lobe of energy but the binary codes are not repeated over long epochs of multiple orthogonal codes and do not contain long strings of 1s or 0s that are common to longer PN codes. These binary codes are only usable as phase shift key data overlay with lower rate data phase shift key modulation for transport of data. However, power spectral density sidelobes are still present causing correlation degradation in the demodulation processes. The power spectral density profile design versatility options are possible with these memory-based random binary codes but code shift key modulation (CSK) is not possible with these codes, thus limiting the spectral bandwidth efficiency for data transport.
The prior art binary modulation codes before the above described options have been shift register based codes in use since about year 1967. These PN codes are continuously generated in real time and are cyclical with short repeating cycles of binary sequences. A specific length shift register produces a single binary code that repeats at short intervals relative to practical wireless communications range delays of a few milliseconds. They are subject to multipath self-interference and experience degraded cross-correlation parameters when partial code lengths are used in PN families of binary codes. The native length shift register codes are extended by overlaying supplemental codes to enable use of multiple code length epochs resulting in further degradation of the cross-correlation parameters present with code-on-code modulations. This code-on-code phase-shifting for code extension plus addition transport data bit phase shifting for data demodulation further degrades the cross-correlation parameters of the transmitted PN codes.
A common prior art PN binary code is generated with a continuously running shift register that repeats code sequences with significant power spectrum side-lobes relative to the sin x/x main lobe. Direct sequence spread spectrum (DSSS) phase shift key (PSK) modulation is commonly used where longer data bits are phase modulated onto the higher chipping rate PN code sequences. The result is a requirement for extreme transmission bandwidth clearance out to 8× chipping rate to eliminate self-interference between local transmit and receive waveforms. The transmit spectrum bandwidths of these PN codes are much greater than the data bit rate bandwidth that reduces the information transport spectrum efficiency.
A prior art local receiver shift register code generator produces a local PN binary code replica of the cyclical transmitted binary code. This local replica is precisely delayed from the local transmit time of day consistent with communications range delays. Controlled delayed versions of the local synchronized PN code bi-phase modulation patterns are produced from a plethora of delay mechanisms detecting autocorrelation peaks, followed by acquiring and tracking of received PN binary codes. An example of this prior art is found in Sunaga et al. August 2008 U.S. Pat. No. 7,411,993 describing variations in the Gold code PN shift register code generation patterns created from multiple memory-based short PN sequences. The receiver local code autocorrelation process collapses or de-spreads the spectrum bandwidth consistent with the local code length and matching pattern cross-correlation parameters. Much lower data rates are used to phase modulate across many PN binary code lengths to form a second-tier data bit modulation rate much lower than the PN code chipping rate. The binary data phase modulation overlays the PN binary chipping modulation and is separately synchronized and detected. Data bits are non-predictable requiring complex stochastic detection methods to extract data bit synchronization. The signal processing system data rate to PN code chipping rate ratio is small in these cases, and spectrum inefficiency results. Examples of bandwidths and throughputs even with advanced optimum frequency division multiplexing (OFDM) waveforms for WIFI 802.11n produce only short range 100 Mbps throughput with a 40 MHz or greater bandwidth using the 5 GHz frequency band. Recent longer-range versions referred to as LTE-U employ time division, amplitude modulation, frequency division, and PN limited digital orthogonal shift-register based codes. These applications are for close range user routers in private homes and offices. The next generation WIFI 802.11ac signal processing system used in very short 50 ft. range applications estimates 1 Gbps throughput and requires 80 MHz or greater bandwidth in the 5 GHz or greater frequency band. The recently approved LTE-U version also has been approved for use in the 5 GHz band and employs multiple in multiple out (MIMO) in the 4×4 mode concurrent operations level. The expected 20 MHz bandwidth employment delivers throughputs of 5 Mbps to 15 Mbps on the average, and up to 300 Mbps in good conditions. When employing all possible modulation modes of time division, amplitude modulation, frequency division, and PN limited digital orthogonal shift-register based codes the throughput can be 1 Gbps requiring an LTE-U bandwidth of 100 MHz or greater in the 5 GHz or higher band.
PN binary codes have a repeat length that constrains the unique autocorrelation bit count length to a fixed value usable in the receiver de-spreading processes. This repeating cycle bit length is a basic characteristic of prior art shift register based binary codes common to XOR feedback shift registers used in the code generation process. An N-length shift register is the source of a prior art PN binary code order N. This shift register of length N creates a limited code binary bit length of a unique bi-phase modulation chip pattern defined by the expression: L=(2^N)−1, where L is the length of the repeating binary bit pattern from a binary shift register. This creates a cyclical repeating code that has a redundancy that must be resolved with code or data overlay processes to extract the data or ranging information. A longer shift register code emulation is required to resolve this short code redundant repeating cycle but is not feasible because of resulting long strings of “1 s” and “0s” that deteriorate all correlation parameters. A method commonly used is the overlay of much lower rate binary codes to emulate a non-repeating code. The result of this is the deterioration of correlation parameters and low data spectrum transport efficiency.
Prior art signal processing systems also use complex pulse shaping options and frequency division multiplexing techniques such as optimum frequency division multiplexing (OFDM) that are constrained to the natural PN code transmit bandwidths. Overlay of other codes and complex carrier-code integration designs such as OFDM increase the cost and increase the sensitivity to relative Doppler parameters causing Doppler based self-interference for vehicles or satellites with relative velocities above 100 mph.
The present PN-based wireless network throughput projection transitions extend through the 3G, 4G, and 5G standards employing only PN OFDM-based code modulation options using shift register based binary code sources. These PN options dictate a greater and greater transmission spectrum bandwidth to meet throughput requirements. This expansion extends to higher GHz bands with greater and greater bandwidth transmissions to meet 1 Gbps and greater network wireless throughputs.
In view of the technology limitations in the prior art PN-code based wireless systems, binary shift-register based code generators, and OFDM based waveforms, it would be advantageous to have a pre-saved memory based source of more ideal non-repeating random non-cyclical orthogonal binary CSK codes created by a one-time generator load process that can generate bandwidth optimized CSK codes capable of 4-bit CSK symbol data transport. This would be possible through extraction of 16 orthogonal CSK symbol codes per CSK code. Also, it would be advantageous if the number of unique, non-repeating, and orthogonal CSK codes is unlimited with the only limits the memory size limits. This would provide unlimited sets of orthogonal non-repeating CSK codes as the sources of 4-bit CSK code symbols for data transport. This would eliminate data overlay requirements and eliminate the inherent sidelobes present with PN based binary codes. It would be advantageous to have memory-based CSK codes without sidelobes that can be used to extract 16 orthogonal CSK symbol codes with the same code length and bandwidth that are uniquely detected by using each half-byte as the unique index of the CSK symbol code transmitted. It would also be advantageous to have unlimited numbers of orthogonal CSK binary codes with design selectable bandwidths of 4 MHz to 8 MHz with a fixed 10 MHz chipping rate. These unique CSK symbol codes could employ quadrature phase shift keying allowing the transport of 8-bit bytes using one frequency with two-symbol-code quadrature phase modulators. The advantages of local memory based collections of millions to billions of orthogonal CSK codes with 4-bit symbol code extraction capability allows the local modulator to use unlimited numbers of orthogonal CSK codes as a source of all orthogonal CSK symbol codes that are instantly extractable from each retrieved CSK code in memory usable across 1 or more seconds of orthogonal CSK codes in memory. The receive detection process would be deterministic instead of stochastic where the transmitted code identification is detected from one of 16 known locally extractable symbol codes from the synchronously retrieved CSK code. New technology including the graphene chip technology can be applied to these parallel processes.
It would further be advantageous to have controlled natural bandwidths and controlled power spectral density profiles common to high-count orthogonal CSK symbol codes without spectral sidelobes using a single preferred chipping rate of 10 MHz fitting all applications in this invention.